1、 Product Overview
CLM2543 is a 12 bit switch capacitor analog-to-digital converter produced by Chiplon Microelectronics. It has three control inputs and is easily connected to a microcomputer using a simple 3-wire SPI serial interface. It is one of the best choice devices for 12 bit data acquisition systems. The function and timing of the chip, and the interface circuit of the 8051 microcontroller are provided. A/D and D/A converters are widely used devices in process, instrumentation, equipment, and other detection and control devices. With the development of large-scale integrated circuit technology, various high-precision, low-power, programmable, and low-cost A/D converters are constantly being introduced, making the circuits of microcomputer control systems more concise and reliable.
The connection between the CLM2543 and the peripheral circuit is simple, and the three control inputs are CS(chip selection), INPUT/output CLOCK (I/O CLOCK) and serial DATA input (DATA INPUT). The on-chip 14-channel multiplexer can select any of 11 inputs or one of 3 internal self-test voltages, sample-hold is automatic, the conversion ends, and the EOC output becomes higher.
After the device is powered on, the CSN is high, the I/O CLOCK and DATA OUT signals are not activated, and the DATA OUT is in a high resistance state. When the CSN changes from high to low, the I/O CLOCK and DATA Input signals are enabled to eliminate the high impedance state of DATA OUT, and the device begins to operate. The conversion of analog signals by devices can be understood as the alternating operation of two cycles with different functions. The input-output cycle and the internal conversion cycle are controlled by the external clock I/O CLOCK, and provide 8, 12, and 16 clock cycles based on the output code bit width reflected by the DATA Input to achieve the selection of analog channels and the acquisition of corresponding analog signals.In the input and output cycle, the device synchronously implements two functions: l on the rise of the I/O CLOCKK, the 8-bit data stream provided by DATA INPUT is received. For 12 or 16 I/O CLOCK cycles, DATA INPUT data after the first 8 I/O CLOCK cycles is ignored. l on the fall of the I/O CLOCK, DATA OUTPUT sends the transformation results of the previous cycle, realizing serial output.The output result of the first conversion cycle is ignored. Please note that the output result of the previous cycle matches the I/O CLOCK clock cycle of this cycle. The internal conversion cycle clock signal is provided by an internal oscillator, during which the device performs successive approximation conversion on the collected analog signal. After the input output cycle ends, the internal conversion cycle begins, and the two cycles alternate to achieve complete conversion of analog signals and serial output, and greatly eliminate the impact of external digital signal noise on conversion accuracy.
2、Product Features
12 bit resolution A/D converter
11 analog input channels
3 built-in self-check modes
Built-in sampling hold function
66 KSPS sampling rate
10μs conversion time in the operating temperature range
SPI serial interface
The maximum linearity error is ±1LSB
Low supply current (1mA typical)
The power-off mode current is 4μA
System clock on chip
Programmable MSB or LSB precursors
Programmable power failure
End of Conversion (EOC) output
With single and bipolar output
Programmable output data length
3、 Application
Smart grid
New energy generation
Power system
Electrified railway tracks
Urban rail transit
Electric vehicle charging station
Smart buildings